Introduction

Welcome to the QtRvSim User Manual.

QtRvSim is a graphical simulator designed to support learning the fundamentals of computer architecture using the RISC-V instruction set. It provides an interactive environment for writing, assembling, and simulating simple RISC-V assembly programs. By visualizing instruction execution on different processor models, QtRvSim helps make abstract computer architecture concepts clear and tangible.

The project is developed by the Computer Architectures Education project at Czech Technical University and souce code is available on GitHub.

Key Features

• Visual Datapaths – Observe execution on both single-cycle and 5-stage pipelined processor models.
• Integrated Tools – Write code with the built-in text editor and assemble directly within the simulator.
• State Inspection – Inspect register contents, memory, and cache status in real time.
• Peripheral Emulation – Experiment with simulated devices, including a terminal, LCD, and LEDs/buttons.
• Cross-Platform Support – Available on Linux, Windows, macOS, and via WebAssembly (browser-based).

About This Manual

This manual will guide you through:

• Installing QtRvSim on your preferred platform
• Understanding the user interface
• …

Whether you are a student learning the basics of computer architecture or an instructor looking for an accessible teaching tool, QtRvSim provides an intuitive and hands-on way to experiment with RISC-V systems.